1. Field of the Invention
The present invention relates to an electron-beam lithography projection system, and more particularly, to an electron-beam emitter capable of securing a uniform electric field within an insulating layer of the emitter and simplifying a manufacturing method therefor.
2. Description of the Related Art
During a semiconductor manufacturing process, various lithographic techniques are employed to form a desired pattern on the surface of a substrate. Conventional optical lithography using light such as ultraviolet rays has a limit regarding a line width that can be implemented with this technique. For this reason, next generation lithography (NGL) techniques have been recently proposed, by which more miniaturized and integrated semiconductor ICs with nano-scale line widths can be realized. Examples of the NGL techniques include electron-beam projection lithography (EPL), ion projection lithography (IPL), extreme ultraviolet lithography (EUVL), and proximity X-ray lithography.
Among the NGL systems, EPL systems for patterning an electron-resist coated on a substrate to be processed into a desired form by using electron-beams emitted from an emitter are currently widely used since they have a simplified structure and it is easy to implement a large-area electron-beam emitter. Electron beam emitters with various structures can be adopted for this EPL system, and two examples of these structures are shown in FIGS. 1 and 2.
Referring to FIG. 1, a conventional metal-insulator-semiconductor (MIS) type emitter 10 has a structure in which an insulating layer 12 and a gate electrode 13 are sequentially stacked on a silicon substrate 11. The insulating layer 12 is formed from a silicon oxide layer, and the gate electrode 13 is made of conductive metal such as gold (Au).
As shown in FIG. 2, a metal-insulator-metal (MIM) type emitter 20 has a structure in which a lower electrode 22, an insulating layer 23, and a gate electrode 24 are sequentially stacked on a silicon substrate 21. Typically, the lower electrode 22 is made of aluminum (Al)—neodymium (Nd) alloy, the insulating layer 23 is made of anodized alumina, and the gate electrode 24 is made of a conductive metal such as gold (Au).
The insulating layers 12 and 23 of the conventional MIS and MIM type emitters 10 and 20, respectively, are patterned into a predetermined form and comprise thin and thick portions. In the emitters constructed above, electrons are emitted through the thin portions of the insulating layers 12 and 23.
FIGS. 3A–3D are cross-sections for explaining a method of manufacturing the conventional MIS type emitter 10 shown in FIG. 1. Referring to FIG. 3A, the surface of the silicon substrate 11 is thermally oxidized to form a silicon oxide layer 12a to a predetermined thickness. Then, as shown in FIG. 3B, the silicon oxide layer 12a are patterned into a desired form, and a silicon oxide layer 12b is formed as shown in FIG. 3C. As a result, the insulating layer 12 is lapped over the silicon substrate 11 in a predetermined pattern. Finally, as shown in FIG. 3D, a conductive metal such as gold (Au) is deposited over the entire surface of the insulating layer 12 to a predetermined thickness to form the gate electrode 13. After undergoing the above steps, the MIS type emitter 10 configured as above is completed.
The conventional MIM type emitter 20 of FIG. 2 is manufactured in a similar way. The process of manufacturing the conventional emitter 10 or 20 involves forming the insulating layer 12 or 23 by performing two steps of forming an oxide layer and one step of patterning the oxide layer and forming the gate electrodes 13 or 24 on the stepped insulating layer 12 or 23. This process is very complicated and in addition the conventional emitter 10 or 20 does not secure a uniform electric field within the insulating layer 12 or 23 due to the stepped structure.